Constructing hierarchical power networks for nanometer chips

被引：0
|
作者：
Young, T [1 ]
机构：
[1] Monterey Design Syst, Monterey, CA USA
来源：
EDN | 2001年 / 46卷 / 26期
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：52 / 52
页数：1
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