A Capacitance-Ratio-Modulated Current Front-End Circuit With Pulsewidth Modulation Output for a Capacitive Sensor Interface

被引:30
|
作者
Sheu, Meng-Lieh [1 ]
Hsu, Wei-Hung [1 ]
Tsao, Lin-Jie [1 ]
机构
[1] Natl Chi Nan Univ, Dept Elect Engn, Puli 54561, Taiwan
关键词
Capacitance measurement; dual-slope integration; smart sensor interface; NOISE; CONVERTER; DESIGN; MODE;
D O I
10.1109/TIM.2011.2161929
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a front-end circuit with pulsewidth modulation (PWM) output for a capacitive sensor interface. A single-MOSFET-based capacitance-ratio-modulated current (CRMC) circuit is proposed to transform the sensed capacitance into a current proportional to a capacitance ratio. The proposed single-MOSFET-based CRMC circuit not only saves a lot of chip area but also lowers power consumption. Then, a dual-slope integration circuit transforms further the modulated current into PWM output. A prototype chip is designed and fabricated with a 0.35-mu m complementary metal-oxide-semiconductor process and has a core area of 0.09 mm(2). The measurement results of the prototype chip demonstrate an accuracy value of up to 9.3 bit with 54-mu W power consumption. The microwatt power consumption and the small chip area of the proposed front-end circuit make it very suitable for a capacitive sensor interface in smart sensor chips.
引用
收藏
页码:447 / 455
页数:9
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