Pseudo-Pseudo-Differential Multibit Delta-Sigma Modulator

A delta-sigma ADC was designed using a pseudo-pseudo-differential (PPD) architecture. Such architecture uses a single-ended circuitry that duplicates the input, inverts one of the signals, and processes both versions in a time-interleaved manner. This allows separation of the input from internal time-correlated noises, which are high-pass filtered upon digital recombination, increasing the in-band SNR. In this paper a 90 dB SNDR, 20 kHz bandwidth second-order modulator was designed with the goal of comparing this technique with traditional single-ended and pseudo-differential ones. In addition, simulation results in a 180 nm process, show that high-performance techniques, such as multi-bit quantization and low-distortion topologies, are compatible with PPD.