A low-voltage integrated CMOS analog lock-in amplifier prototype for LAPS applications

被引：43
|
作者：
Ferri, G
De Laurentiis, P
D'Amico, A
Di Natale, C
机构：
[1] Univ Aquila, Fac Ingn, Dipartimento Ingn Elettr, I-67040 Laquila, Italy
[2] Univ Roma Tor Vergata, Fac Ingn, Dipartimento Ingn Elettron, I-00133 Rome, Italy
来源：
SENSORS AND ACTUATORS A-PHYSICAL | 2001年 / 92卷 / 1-3期
关键词：
sensor interface; LAPS; lock-in amplifiers;
D O I：
10.1016/S0924-4247(01)00581-7
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A first version of a low supply voltage (2 V) fully integrated lock-in amplifier, designed in a standard CMOS technology (AMS 0.6 mu), is presented. Two different 1 KHz and 10 KHz signals, embedded in noise, have been considered for the lock-in test, where the signal to noise (SIN) ratio has been taken less than 0.1. The amplifier shows low input equivalent voltage noise, being less than 20 nV/(Hz)(1/2) at the considered frequencies. The theoretical dynamic reserve, a typical lock-in quality factor which gives a direct measure of the worst-case signal-to-noise ratio, has been determined to be greater than 60 dB at 1 KHz input frequency. The circuit has been tested with a typical light addressable potentiometric sensors (LAPS) waveform, embedded in noise and the signal has been completely recovered. (C) 2001 Elsevier Science B.V. All rights reserved.
引用
收藏
页码：263 / 272
页数：10
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