Delayed program mapping in concordia parallel programming environment

In a partitionable or reconfigurable parallel system, the subsystem assigned to ran a parallel program is dynamically assigned immediately before the program loading according to some system optimization policies. The mapping of processes to processors cannot be fixed until program loading. In this paper we introduce the delayed mapping technique adopted by our Concordia Parallel Programming Environment (CPPE). We use virtual architecture as the programming model to capture the communication characteristics of parallel programs, and let programmers declare virtual architectures and map processes to virtual processors. At program loading time an optimized mapping of virtual processors to physical processors in the assigned system partition is chosen from an optimized mapping library or specified by the user. All inter-process communications in the program are transformed into inter-processor communications at execution time with the help of the mapping tables.