An adaptive current-boosting voltage buffer for low-power low dropout regulators

A voltage buffer to solve the slew-rate limit problem at the gate of the power transistor of LDOs is proposed in this paper. The proposed idea, based on the capacitive-coupling method to provide an instantaneous boost of the transient current to charge/discharge the gate capacitance of the power transistor, provides power saving of the voltage buffer and enables fast load transient responses of the LDOs simultaneously. The proposed idea is applied to a LDO design and simulated with BSIM models of a commercial 0.35-mu m CMOS technology. The quiescent current is about 3.5 mu A, and the setting time of the load transient response is greatly improved, when comparing to the LDO without the proposed idea.