Automatic Generation of Simulation Workflows for System Verification using XDSM Representation

In this paper we present an approach for the automatic generation of simulation workflow diagrams used for system verifications. By using this approach, the system engineer can specify the verification components at the system development phases. The workflow description is generated with an algorithm that converts the system level specifications to XDSM diagrams. These diagrams help in the communication and collaboration between system engineers and other discipline engineers. They also help in implementing the verification process in dedicated MDO/MSDO software frameworks. An example of a speed reducer system is considered to illustrate the usefulness of the proposed approach.