Hardware-Accelerated Simulation Tool for End-to-End Communication Systems

被引：0
|
作者：
Lin, V. S. [1 ]
Pansatiankul, D. E. [1 ]
机构：
[1] Aerosp Corp, Los Angeles, CA 90009 USA
来源：
GLOBECOM 2006 - 2006 IEEE GLOBAL TELECOMMUNICATIONS CONFERENCE | 2006年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We present a hardware/software co-simulation tool for computation-intensive, end-to-end communication systems. The tool uses commercial field-programmable gate arrays (FPGAs), together with a high-level programming language, to accelerate the total simulation run time. This paper not only describes the design and implementation aspects of the tool, but also presents the laboratory demonstration of the system. Based on the test results, we compare the real-time throughput performance of FPGA-based co-simulation with that of conventional software-only simulation.
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页数：5
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