Cryo-CMOS Compact Modeling

被引:14
|
作者
Enz, Christian [1 ]
Beckers, Arnout [1 ]
Jazaeri, Farzan [1 ]
机构
[1] Ecole Polytech Fed Lausanne, ICLAB, Lausanne, Switzerland
基金
欧盟地平线“2020”;
关键词
LOW-TEMPERATURE; TECHNOLOGY; VOLTAGE;
D O I
10.1109/IEDM13553.2020.9371894
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper highlights some of the challenges faced for the modeling of MOSFET devices for operation at cryogenic temperature (CT). A special focus is given on the modeling of the threshold voltage V-T and the subthreshold swing SS. The significant increase of V-T at CT reduces the available overdrive voltage and therefore needs to be modeled properly. The SS saturates to a constant value below a critical temperature T-c of typically 40K. This mitigates the current saving that could be expected from reducing the temperature since the transconductance for a given current does not scale inversely with 1/T below T-c. A correct modeling of these two phenomena is therefore key for developing an improved compact model (CM) that scales with T from RT down to CT.
引用
收藏
页数:4
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