A low cost-low loss broadband integration of a CMOS transmitter and its antenna for mm-wave FMCW radar applications

被引:6
|
作者
Salarpour, Mandi [1 ]
Farzaneh, Forouhar
Staszewski, Robert Bogdan
机构
[1] Sharif Univ Technol, Dept Elect Engn, Microwave & Opt Commun Grp, Tehran 111554363, Iran
基金
欧洲研究理事会;
关键词
Wire bonding; Interconnect; Matching circuit; GCPW; Microstrip; ADPLL; IN-PACKAGE; DESIGN; CHIP; INTERCONNECTION;
D O I
10.1016/j.aeue.2018.08.032
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 60 GHz low-loss wideband interconnection of a CMOS transmitter and its antenna is presented in this paper. The integrated transmitter consists of an all-digital phase-locked loop (ADPLL) IC chip and a U-slot patch antenna connected through wire bonding and compensation matching circuit to operate in the 57-63 GHz frequency band. The system is implemented on a sandwiched printed circuit board (PCB) comprising FR4 to embed the ADPLL and the high-frequency Rogers laminate R043506 for the antenna and the matching network. The matching circuit is designed in two configurations microstrip and grounded coplanar waveguide (GCPW) to compensate for the wire bond inductance. The capability and sensitivity of these two topologies considering the wire bond geometry variations are compared which points out that GCPW is more robust to wire bonding parasitic effects. Finally, the GCPW matching circuit is fabricated and interconnected to the ADPLL die and its performance is examined using hybrid simulation/measurement data. (C) 2018 Elsevier GmbH. All rights reserved.
引用
收藏
页码:313 / 325
页数:13
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