43 Gb/s DQPSK Pre-equalization employing 6-bit, 43GS/s DAC Integrated LSI for Cascaded ROADM Filtering

被引：0

作者：

Sugihara, T. ^{[1
]}

Kobayashi, T. ^{[1
]}

Konishi, Y. ^{[1
]}

Hirano, S. ^{[1
]}

Tsutsumi, K. ^{[1
]}

Yamagishi, K. ^{[1
]}

Ichikawa, T. ^{[1
]}

Inoue, S. ^{[1
]}

Kubo, K. ^{[1
]}

Takahashi, Y. ^{[1
]}

Goto, K. ^{[1
]}

Fujimori, T. ^{[1
]}

Uto, K. ^{[1
]}

Yoshida, T. ^{[1
]}

Sawada, K. ^{[1
]}

Kametani, S. ^{[1
]}

Bessho, H. ^{[1
]}

Inoue, T. ^{[1
]}

Koguchi, K. ^{[1
]}

Shimizu, K. ^{[1
]}

Mizuochi, T. ^{[1
]}

机构：

[1] Mitsubishi Electr Corp, Informat Technol R&D Ctr, Kamakura, Kanagawa 2478501, Japan

来源：

2010 CONFERENCE ON OPTICAL FIBER COMMUNICATION OFC COLLOCATED NATIONAL FIBER OPTIC ENGINEERS CONFERENCE OFC-NFOEC | 2010年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Electronic pre-equalization for 43 Gb/s DQPSK has been demonstrated for the first time. Waveform distortion caused by bandwidth narrowing to 18.1 GHz by cascaded 10 Gb/s ROADMs has been adequately pre-equalized by a SiGe-BiCMOS LSI with 6-bit, 43 GS/s digital-to-analog converters. (C) 2010 Optical Society of America

引用

页数：3