共 50 条
- [2] Fuzzy logic arbiters for multiple-bus multiprocessor systems [J]. IEEE TRANSACTIONS ON SYSTEMS MAN AND CYBERNETICS PART C-APPLICATIONS AND REVIEWS, 2004, 34 (03): : 281 - 292
- [4] CONTROL OF THE ACCESS TO A SHARED BUS - ARBITERS [J]. RAIRO-AUTOMATIQUE-SYSTEMS ANALYSIS AND CONTROL, 1983, 17 (04): : 359 - 403
- [9] Performance analysis of multiprocessor systems with bus architecture [J]. Matsunaga, Toshio, 1600, (22):