Assembly and reliability of "large die" flip-chip chip scale packages

Flip-chip packaging technology is rapidly becoming the first choice for the vast majority of electronic packaging applications. Designers are trying to find ways to incorporate flip-chip devices into stacked die, System in Package (SiP), optoelectronics and chip scale package (CSP) applications. The largest volume of flip-chip packages come in the form of CSPs. CSPs are characterized as having low bump counts, ball grid array (BGA) pitches of less than 1.0 mm and overall package dimensions less than 20% larger than the semiconductor device. Reliability performance of CSPs with devices 6 mm square or less is excellent. However, package stresses increase with increasing device and package size. Amkor's fcCSP packages have traditionally contained 'small' die, e.g. in the range of 3 to 6 mm square. Amkor has developed two large die' flip-chip CSP packages that maintain the same reliability as their smaller fcCSP predecessors and can be assembled on the same line as current fcCSP products. A third package was designed in which a flip-chip device is mounted to a conventional wirebonded device in 'stacked' configuration. This stacked package allows a significant increase in package functionality while maintaining CSP status. Critical process parameters and sequences needed to enable volume assembly of these package were identified and reliability levels for a variety of package configurations were determined.