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An Efficient Accelerator Unit for Sparse Convolutional Neural Network

被引：0
|
作者：
Zhao, Yulin [1 ]
Wang, Donghui
Wang, Leiou
机构：
[1] Chinese Acad Sci, Key Lab Informat Technol Autonomous Underwater Ve, Beijing 100190, Peoples R China
来源：
TENTH INTERNATIONAL CONFERENCE ON DIGITAL IMAGE PROCESSING (ICDIP 2018) | 2018年 / 10806卷
关键词：
neural network; sparse; CNN; FPGA; accelerator; parallel; efficient; LeNet;
D O I：
10.1117/12.2503042
中图分类号：
O43 [光学];
学科分类号：
070207 ; 0803 ;
摘要：
Convolutional neural network is widely used in image recognition. The associated model is computationally demanding. Several solutions are proposed to accelerate its computation. Sparse neural network is an effective way to reduce the computational complexity of neural networks. However, most of the current acceleration programs do not make full use of this feature. In this paper, we design an acceleration unit, using FPGA as the hardware platform. The accelerator unit achieves parallel acceleration through multiple CU models. It eliminates the unnecessary operations by the Match model to improve efficiency. The experimental results show that when the sparsity is ninety percent, the performance can be increased to 3.2 times.
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页数：5
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