Novel radix-2k square root module

被引:2
|
作者
Bashagha, AE [1 ]
机构
[1] De Montfort Univ, Fac Comp Sci & Engn, Dept Engn & Technol, Leicester LE1 9BH, Leics, England
来源
关键词
D O I
10.1049/ip-cds:20010453
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The conventional two's complement radix-2(k) square root algorithm requires a set of 2(k) full precision comparisons to generate all the 2(k) possible values of the partial remainder. The correct remainder is the minimum positive one of the 2(k) possible values. Since the number of adders of the 2(k) full wordlength comparisons increases exponentially with k, a huge area is required to implement this algorithm, especially for high values of k. The paper presents a new two's complement high radix square root algorithm. For the First time, the 2(k) full wordlength additions are replaced with 2(k) one-digit (i.e. k-bit) additions only. It has been shown that the one-digit additions are enough to reduce the number of possible values of the partial remainder from 2(k) to two values only. Then. only two full wordlength additions are required to select the minimum positive value of these two values as the correct remainder. As a result, the silicon area is reduced significantly while the speed is nearly the same. Moreover, the new algorithm can be made faster by using one of the known fast adders because it requires only two (rather than 2(k)) full wordlength additions. From the evaluation of the proposed Structure. it has been shown that the required area is reduced by 65% For radices of 32 and 64.
引用
收藏
页码:190 / 196
页数:7
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