Comments on "Comments on 'A systematic approach for design of digit serial signal processing architectures'"

被引:0
|
作者
Bashagha, AE [1 ]
机构
[1] De Montfort Univ, Fac Comp Sci & Engn, Dept Engn & Technol, Leicester LE1 9BH, Leics, England
关键词
arithmetic processors; computer architecture; digit recurrence; nonrestoring algorithm; square root; two's complement numbers;
D O I
10.1109/82.917786
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In the above paper (1), the authors have modified the nonrestoring square root algorithm (Q = rootA) and its architecture of [1] to give correct results. They claimed that the partial remainder (PR) should be kept as is rather than eliminating its MSB at each step of the algorithm, Since two hits of A are appended to PR at each step of the algorithm, length of kth PR will be 2k rather than k + 1 as in the algorithm of [1], They also suggested that k of 0's to be appended to the left of the MSB of the radicand to keep its length as that of PB, it result, k - 1 CAS cells are added to the kth row of the architecture of [1], In this comment, it will be shown that most of the additional CAS cells are redundant where only one added CAS cell per each row is enough to compute the correct square root.
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页码:177 / 179
页数:3
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