Hardware-based power management for real-time applications

被引：1

作者：

Uhrig, S ^{[1
]}

Ungerer, T ^{[1
]}

机构：

[1] Univ Augsburg, Inst Comp Sci, D-86159 Augsburg, Germany

来源：

SECOND INTERNATIONAL SYMPOSIUM ON PARALLEL AND DISTRIBUTED COMPUTING, PROCEEDINGS | 2003年

关键词：

power-aware program execution; frequency adjustment; dynamic voltage scaling; real-time scheduling; multithreading;

D O I：

10.1109/ISPDC.2003.1267672

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

This paper presents a new power management technique integrated into a multithreaded microcontroller with built-in real-time scheduling schemes. Power management is done by hardware based on the Guaranteed Percentage scheduling scheme. The applied power saving mechanisms are frequency reduction, dynamic voltage scaling and pipeline gating. Our evaluation showed that for a given workload with an average processor utilization of 22.6% and a frequent change of utilization in the range of 0% to 58% energy consumption could be reduced to 12.7% of the energy required by a system running at top speed.

引用

页码：258 / 265

页数：8

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