A CMOS HDSL2 analog front-end

被引：4
|
作者：
Gattani, A [1 ]
Cline, DW
Hurst, PJ
Mosinskis, PM
机构：
[1] Level One Commun, New Jersey Design Ctr, Morganville, NJ 07751 USA
[2] Level One Commun, Sacramento, CA 95827 USA
[3] Univ Calif Davis, Davis, CA 95616 USA
来源：
IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2000年 / 35卷 / 12期
关键词：
analog-digital conversion; analog front-end; digital-analog conversion; dynamic element matching; gain boosting amplifier; HDSL2; inverse follow-the-leader filter; MASH architecture; sigma-delta modulation; subscriber loops; switched-capacitor filters; xDSL;
D O I：
10.1109/4.890311
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A 5-V 0.5-mum CMOS analog front-end (AFE) IC for HDSL2 incorporates transmit digital-to-analog converter (DAC), transmit filters, output buffer, receive AGC, and receive ADC, The AFE consumes 525 mW and provides better than 82-dB signal-to-noise-and distortion ratio (SNDR) in both transmit and receive paths. It supports variable data rates from 64 kb/s up to 2.32 Mb/s, and enables an HDSL2 system to achieve better than 14 kft of noise-free reach ton 26-gauge mire) at 1.544 Mb/s.
引用
收藏
页码：1964 / 1975
页数：12
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