A Monolithic CMOS MEMS Accelerometer with Chopper Correlated Double Sampling Readout Circuit

被引：0
|
作者：
Wang, Chun-Kai [1 ]
Chen, Che-Sheng [1 ]
Wen, Kuei-Ann [1 ]
机构：
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 300, Taiwan
来源：
2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2011年
关键词：
3-AXIS MICRO-ACCELEROMETER; LOW-NOISE; AMPLIFIER;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A monolithic CMOS MEMS capacitive accelerometer with micropower analog readout circuit is presented in this paper. In order to optimize noise-power performance of accelerometer in limited area, a specification driven MEMS/IC co-design flow is adopted. In analog readout circuit design, the proposed circuit architecture combines chopper stabilization and correlated double sampling to suppress low frequency noise and compensate DC offset. The RMS input referred noise voltage is 9.82 nV/root Hz under 100Hz. The power consumption is 36uW at 100kHz modulation frequency.
引用
收藏
页码：2023 / 2026
页数：4
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