Product accumulate codes: A class of codes with near-capacity performance and low decoding complexity

被引:72
|
作者
Li, J [1 ]
Narayanan, KR [1 ]
Georghiades, CN [1 ]
机构
[1] Texas A&M Univ, Dept Elect Engn, College Stn, TX 77843 USA
基金
美国国家科学基金会;
关键词
accumulator; low complexity; low-density parity-check (LDPC) codes; product codes; rate adaptivity; turbo product codes (TPC);
D O I
10.1109/TIT.2003.821995
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
We propose a novel class of provably good codes which are a serial concatenation of a single-parity-check (SPC)-based product code, an interleaver, and a rate-1 recursive convolutional code. The proposed codes, termed product accumulate (PA) codes, are linear time encodable and linear time decodable. We show that the product code by itself does not have a positive threshold, but a PA code can provide arbitrarily low bit-error rate (BER) under both maximum-likelihood (ML) decoding and iterative decoding. Two message-passing decoding algorithms are proposed and it is shown that a particular update schedule for-these message-passing algorithms is equivalent to conventional turbo decoding of the serial concatenated code, but with significantly lower complexity. Tight upper bounds on the ML performance using Divsalar's simple bound and thresholds under density evolution (DE) show that these codes are capable of performance within a few tenths of a decibel away from the Shannon limit. Simulation results confirm these claims and show that these codes provide performance similar to turbo codes but with significantly less decoding complexity and with a lower error floor. Hence, we propose PA codes as a class of prospective codes with good performance, low decoding complexity, regular structure, and flexible rate adaptivity for all rates above 1/2.
引用
收藏
页码:31 / 46
页数:16
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