An abstract interpretation-based timing validation of hard real-time avionics software

被引:19
|
作者
Thesing, S [1 ]
Souyris, J [1 ]
Heckmann, R [1 ]
Randimbivololona, F [1 ]
Langenbach, M [1 ]
Wilhelm, R [1 ]
Ferdinand, C [1 ]
机构
[1] Univ Saarland, FR Informat, D-66041 Saarbrucken, Germany
关键词
D O I
10.1109/DSN.2003.1209972
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Hard real-time avionics systems like flight control software are expected to always react in time. Consequently, it is essential for the timing validation of the software that the worst-case execution time (WCET) of all tasks on a given hardware configuration be known. Modern processor components like caches, pipelines, and branch prediction complicate the determination of the WCET considerably since the execution time of a single instruction may depend on the execution history. The safe, yet overly pessimistic assumption of no cache hits, no overlapping executions in the processor pipeline, and constantly mispredieted branches results in a serious overestimation of the WCET Our approach to WCET prediction was implemented for the Motorola ColdFire 5307. It includes a static prediction of cache and pipeline behavior, producing much tighter upper bounds for the execution times. The WCET analysis tool works on real applications. It is safe in the sense that the computed WCET is always an upper bound of the real WCET It requires much less effort, while producing more precise results than conventional measurement-based methods.
引用
收藏
页码:625 / 632
页数:8
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