A NEW APPROACH TO THE DESIGN OF SAFETY-CRITICAL SYSTEMS BASED ON VIRTUAL PROTOTYPING, ASSERTIONS AND SIMULATION

Embedded systems for safety-critical applications need design methods, which comply with the requirements of such sensitive systems. We propose a new approach to the design of such systems: The method of Virtual Prototyping in combination with assertions for an UML-based system design. This means that we build an abstract model of a heterogeneous embedded system including functional and especially timing constraints from the very beginning. The Unified Modeling Language (UML) has been extended to model complex heterogeneous systems rather than just software. The Virtual Prototype is made executable on an open simulator platform. From the simulation we derive information about the system's functional and timing behavior, which is fed back to the UML system level. We discuss the assertion-based design process and its implementation by corresponding design tools, and show how assertions can vastly improve the quality of embedded system design.