Automatic mapping of C to FPGAs with the DEFACTO compilation and synthesis system

被引：9

作者：

Diniz, P ^{[1
]}

Hall, M ^{[1
]}

Park, J ^{[1
]}

So, B ^{[1
]}

Ziegler, H ^{[1
]}

机构：

[1] Univ So Calif, Inst Informat Sci, Marina Del Rey, CA 90292 USA

来源：

MICROPROCESSORS AND MICROSYSTEMS | 2005年 / 29卷 / 2-3期

基金：

美国国家科学基金会;

关键词：

design automation; parallelizing compiler technology and data dependence analysis; behavioral synthesis and estimation; reconfigurable computing; field-programmable-gate-arrays (FPGAs);

D O I：

10.1016/j.micpro.2004.06.007

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The DEFACTO compilation and synthesis system is capable of autornatically mapping computations expressed in high-level imperative programming languages as C to FPGA-based systems. DEFACTO combines parallelizing compiler technology with behavioral VHDI, synthesis tools to guide the application of high-level compiler transformations in the search of high-quality hardware designs. In this article we illustrate the effectiveness of this approach in automatically mapping several kernel codes to an FPGA quickly and correctly. We also present a detailed example of the comparison of the performance of an automatically generated design against a manually generated implementation of the same computation. The design-space-exploration component of DEFACTO is able to explore a large number of designs for a particular computation that would otherwise be impractical for any designers. (C) 2004 Elsevier B.V. All rights reserved.

引用

页码：51 / 62

页数：12

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