CMOS signal processing circuits on Si (111) for neural activity image-recording with epitaxially grown micro-Si probes

被引：0

作者：

Kato, Y ^{[1
]}

Kawano, T ^{[1
]}

Ito, Y ^{[1
]}

Takao, H ^{[1
]}

Sawada, K ^{[1
]}

Ishida, M ^{[1
]}

机构：

[1] Toyohashi Univ Technol, Dept Elect & Elect Engn, Toyohashi, Aichi 4418580, Japan

来源：

BOSTON TRANSDUCERS'03: DIGEST OF TECHNICAL PAPERS, VOLS 1 AND 2 | 2003年

关键词：

CMOS on Si(111); neural activity recording; micro-Si probe arrays; VLS growth;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper reports a signal processing circuits on Si (111) for the use in multi-point neural activity recording. The circuit for neural activity image-recording includes 64-site two-dimensional (213) arrays, two 8-bit shift registers, and ripple carry counter. The problem when CMOS is formed on Si (111) is degradation of device performance caused by the higher density of interface states on Si (111) as compared with Si (100). Therefore, IC fabrication process was optimized for improving characteristic of MOSFET on Si (111). CMOS on Si (111) can be fabricated with required performance for recording system. The bandwidth of shift register on Si (I 11) is nearly equal to that on Si (100). The circuits on Si (111) are possible to be realized and available for neural activity image-recording.

引用

页码：1687 / 1690

页数：4