Perspectives and challenges in nanoscale device modeling

被引：3
|
作者：
Iannaccone, G [1 ]
机构：
[1] Univ Pisa, Dipartimento Ingn Informaz Elettr Informat Teleco, I-56122 Pisa, Italy
来源：
MICROELECTRONICS JOURNAL | 2005年 / 36卷 / 07期
关键词：
nanoelectronics; semiconductor device modelling; TCAD; nanotechnology;
D O I：
10.1016/j.mejo.2005.04.032
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, we discuss the role of adequate modelling tools in the development of nanoelectromic technology and devices, including both down-the-roadmap Complementary Metal-Oxide-Semiconductor (CMOS) technology and alternative nanodevices. Such tools can enable understanding of the relevant physical mechanisms on the one hand, and performance evaluation and optimization of device structures, on the other hand. Relevant examples are discussed, drawn by our recent activity, including ballistic strained-silicon Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs), stress-induced leakage currents, nanocrystal memories, and silicon nanowire transistors. (c) 2005 Elsevier Ltd. All rights reserved.
引用
收藏
页码：614 / 618
页数：5
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