Dynamic management of scratch-pad memory space

被引：0

作者：

Kandemir, M ^{[1
]}

Ramanujam, J ^{[1
]}

Irwin, MJ ^{[1
]}

Vijaykrishnan, N ^{[1
]}

Kadayif, I ^{[1
]}

Parikh, A ^{[1
]}

机构：

[1] Penn State Univ, Microsyst Design Lab, University Pk, PA 16802 USA

来源：

38TH DESIGN AUTOMATION CONFERENCE PROCEEDINGS 2001 | 2001年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

optimizations aimed at improving the efficiency of on-chip memories are extremely important. We propose a compiler-controlled dynamic on-chip scratch-pad memory (SPM) management framework that uses both loop and data transformations. Experimental results obtained using a generic cost model indicate significant reductions in data transfer activity between SPM and off-chip memory.

引用

页码：690 / 695

页数：6

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