FPGA Implementation of Non-Subsampled Shearlet Transform for Image Fusion

The non-subsampled shearlet transform is a new image analysis techniques for image fusion applications. Primarily, the non-subsampled shearlet transform is used to separate the input images to individual image coefficients, and that coefficients are low-pass subband coefficients and a series of band-pass directional subband coefficients, individually. Then applying different fusion rules to fuse the low-pass subband and band-pass directional subband coefficients of input images. And resultant fused low-pass and band-pass directional subband coefficients are obtained. Finally by applying inverse non-subsampled shearlet transform on fused subband coefficients to obtaining composed fused image. Implementation of this system is done on Xilinx chip of ML605 Virtex-6 xc6v1x240t-1ff1156 using Xilinx system generator 14.5 with MATLAB R2013a version 8.1.0.604 and Hardware Co-simulation for ML605 virtex-6 FPGA is done. The proposed image analysis technique for image fusion reduces the time required to obtaining fused image, improves calculation efficiency and provides high visual quality of fused image. In the proposed system the experimental results shows that the Xilinx System generator based designs are bit and cycle accurate, so MATLAB simulation results exactly match those seen on hardware ML605 virtex-6 FPGA board. Also the analysis of total delay path, ISE reports, timing analysis, and Xilinx power analysis is observed in Xilinx system generator. This design are simulated by Xilinx ISim simulator and ML605 Virtex-6 FPGA board is used for Synthesis, Implementation and Xilinx power analyzer helps to power analysis. So from power analysis, timing analysis and resources utilization, it is observed that, the proposed FPGA based design reduces 50% power, decreases utilized logic cells, LUTs (area) and delay.