共 50 条
- [1] The Verification and Validation of Embedded Systems using Cleanroom Software Engineering [J]. NANOTECHNOLOGY AND COMPUTER ENGINEERING, 2010, 121-122 : 922 - 928
- [2] An architectural approach to the analysis, verification and validation of software intensive embedded systems [J]. Computing, 2013, 95 : 649 - 688
- [3] Embedded Software Product Verification & Validation Using Virtual Reality [VIL] [J]. 2015 IEEE INTERNATIONAL TRANSPORTATION ELECTRIFICATION CONFERENCE (ITEC), 2015,
- [5] Software verification & validation [J]. NORTHCON/96 - IEEE TECHNICAL APPLICATIONS CONFERENCE, CONFERENCE RECORD, 1996, : 265 - 268
- [7] Embedded hardware/software verification and validation using hardware-in-the-loop simulation [J]. IEEE: 2005 International Conference on Emerging Technologies, Proceedings, 2005, : 494 - 498
- [9] Software specification, verification and validation [J]. SADHANA-ACADEMY PROCEEDINGS IN ENGINEERING SCIENCES, 1996, 21 : 123 - 123
- [10] THE VALIDATION, VERIFICATION AND TESTING OF SOFTWARE [J]. OXFORD SURVEYS IN INFORMATION TECHNOLOGY, 1985, 2 : 1 - 40