Power density aware application mapping in mesh-based network-on-chip architecture: An evolutionary multi-objective approach

In the era of many-core chips, the problem of power density is a serious challenge. This is particularly important in Network-on-Chip (NoC)-based systems, where application mapping determines the resulting power patterns and the workload distribution across the entire chip. Despite this fact, the majority of mapping algorithms focus on performance, and the resulting power patterns are largely ignored. This work investigates this problem. Three different power pattern metrics with different scopes are defined, namely, power peak, power range, and regional power density. The results of using them as mapping objectives together with communication cost using a multi-objective evolutionary mapping approach are investigated. Results show that employing power patterns results-in Pareto fronts with different power patterns and features. Results are analysed and discussed. Moreover, a case study of thermal analysis of the resulting power patterns is performed. Results show that using communication cost only results-in large hotspots which translates into higher peak and range of chip temperatures. The proposed mapping objectives are shown to significantly improve thermal balancing (up to 55%) and peak temperature (up to 7.77%). These results indicate the importance of considering power patterns in the design of NoC-based many-core systems and their direct impact on the reliability and performance of such systems.