Gate-Tunable Transmon Using Selective-Area-Grown Superconductor-Semiconductor Hybrid Structures on Silicon

被引:0
|
作者
Hertel, Albert [1 ,7 ,8 ,9 ]
Eichinger, Michaela [1 ]
Andersen, Laurits O. [1 ]
Zanten, David M. T. van [1 ]
Kallatt, Sangeeth [1 ]
Scarlino, Pasquale [2 ]
Kringhoj, Anders [1 ,10 ]
Chavez-Garcia, Jose M. [1 ]
Gardner, Geoffrey C. [3 ,4 ]
Gronin, Sergei [3 ,4 ]
Manfra, Michael J. [3 ,4 ,5 ,6 ]
Kjaergaard, Morten [1 ]
Marcus, Charles M. [1 ]
Petersson, Karl D. [1 ,2 ]
机构
[1] Univ Copenhagen, Niels Bohr Inst, Ctr Quantum Devices, DK-2100 Copenhagen, Denmark
[2] Microsoft Quantum Lab Copenhagen, DK-2100 Copenhagen, Denmark
[3] Purdue Univ, Birck Nanotechnol Ctr, W Lafayette, IN 47907 USA
[4] Microsoft Quantum Lab West Lafayette, W Lafayette, IN 47907 USA
[5] Purdue Univ, Dept Phys & Astron, W Lafayette, IN 47907 USA
[6] Purdue Univ, Sch Mat Engn, Sch Elect & Comp Engn, W Lafayette, IN 47907 USA
[7] Forschungszentrum Julich, Inst Semicond Nanoelectron, Peter Grunberg Inst 9, Julich, Germany
[8] ForschungszentrumJulich, Julich Aachen Res Alliance JARA, Julich, Germany
[9] Rhein Westfal TH Aachen, Aachen, Germany
[10] Univ Colorado Boulder, Dept Elect Comp & Energy Engn, Boulder, CO 80309 USA
基金
新加坡国家研究基金会;
关键词
III-V semiconductors - Indium arsenide - Qubits - Substrates - Superconducting resonators;
D O I
10.1103/PhysRevApplied.18.034042
中图分类号
O59 [应用物理学];
学科分类号
摘要
We present a gate-voltage-tunable transmon qubit (gatemon) based on planar InAs nanowires that are selectively grown on a high-resistivity silicon substrate using III-V buffer layers. We show that low-loss superconducting resonators with an internal quality of 2 x 10(5) can readily be realized using these substrates after the removal of buffer layers. We demonstrate coherent control and readout of a gatemon device with a relaxation time, T-1 asymptotic to 700 ns, and dephasing times, T-2* asymptotic to 20 ns and T-2,T-echo asymptotic to 1.3 mu s. Further, we infer a high junction transparency of 0.4-0.9 from an analysis of the qubit anharmonicity.
引用
收藏
页数:12
相关论文
共 6 条
  • [1] Electrical Properties of Selective-Area-Grown Superconductor-Semiconductor Hybrid Structures on Silicon
    Hertel, A.
    Andersen, L. O.
    van Zanten, D. M. T.
    Eichinger, M.
    Scarlino, P.
    Yadav, S.
    Karthik, J.
    Gronin, S.
    Gardner, G. C.
    Manfra, M. J.
    Marcus, C. M.
    Petersson, K. D.
    [J]. PHYSICAL REVIEW APPLIED, 2021, 16 (04)
  • [2] Gate-Tunable Superconductor-Semiconductor Parametric Amplifier
    Phan, D.
    Falthansl-Scheinecker, P.
    Mishra, U.
    Strickland, W. M.
    Langone, D.
    Shabani, J.
    Higginbotham, A. P.
    [J]. PHYSICAL REVIEW APPLIED, 2023, 19 (06)
  • [3] Gate-Tunable Negative Differential Conductance in Hybrid Semiconductor–Superconductor Devices
    刘明黎
    潘东
    乐天
    贺江波
    贾仲谋
    朱尚
    杨光
    吕昭征
    刘广同
    沈洁
    赵建华
    吕力
    屈凡明
    [J]. Chinese Physics Letters, 2023, (06) : 81 - 92
  • [4] Gate-Tunable Negative Differential Conductance in Hybrid Semiconductor–Superconductor Devices
    刘明黎
    潘东
    乐天
    贺江波
    贾仲谋
    朱尚
    杨光
    吕昭征
    刘广同
    沈洁
    赵建华
    吕力
    屈凡明
    [J]. Chinese Physics Letters., 2023, 40 (06) - 92
  • [5] Selective-Area-Grown Semiconductor-Superconductor Hybrids: A Basis for Topological Networks
    Vaitiekenas, S.
    Whiticar, A. M.
    Deng, M. -T.
    Krizek, F.
    Sestoft, J. E.
    Palmstrom, C. J.
    Marti-Sanchez, S.
    Arbiol, J.
    Krogstrup, P.
    Casparis, L.
    Marcus, C. M.
    [J]. PHYSICAL REVIEW LETTERS, 2018, 121 (14)
  • [6] Gate-Tunable Negative Differential Conductance in Hybrid Semiconductor-Superconductor Devices
    Liu, Ming-Li
    Pan, Dong
    Le, Tian
    He, Jiang-Bo
    Jia, Zhong-Mou
    Zhu, Shang
    Yang, Guang
    Lyu, Zhao-Zheng
    Liu, Guang-Tong
    Shen, Jie
    Zhao, Jian-Hua
    Lu, Li
    Qu, Fan-Ming
    [J]. CHINESE PHYSICS LETTERS, 2023, 40 (06)