Parallel processing - the picoChip way!

This paper describes a new approach to parallel processing within the well targetted application domain of wireless communications systems, using the picoArray(TM). The picoArray(TM) is a tiled-processor architecture, containing 430 heterogeneous processors, connected through a novel, compile-time scheduled interconnect. We show how the features of the picoArray(TM) allow deterministic processing to be achieved, and how the tool chain allows programming to be performed effectively in a combination of high level assembly language and C. By handling a wide variety of types of processing within the picoArray(TM) a single design flow can be used to produce complex communications systems. The effectiveness of this approach is demonstrated through the use of the picoArray(TM) to build a working 3G base-station.