High open-circuit voltage in silicon heterojunction solar cells

High open-circuit voltage (V-oc) silicon heterejunction (SHJ) solar cells are fabricated in double-heterojunction a-Si:H/c-Si/a-Si:H structures using low temperature (<225 degrees C) hydrogenated amorphous silicon (a-Si:H) contacts deposited by hot-wire chemical vapor deposition (HWCVD). On p-type c-Si float-zone wafers, we used an amorphous n/i contact to the top surface and an i/p contact to the back surface to obtain a V-oc of 667 mV in a 1 cm(2) cell with an efficiency of 18.2%. This is the best reported p-type SHJ voltage. In our labs, it improves over the 652 mV cell obtained with a front amorphous n/i heterejunction emitter and a high-temperature alloyed At back-surface-field contact. On n-type c-Si float-zone wafers, we used an a-Si:H (p/i) front emitter and an a-Si:H (i/n) back contact to achieve a V-oc of 691 mV on 1 cm2 cell. Though not as high as the 730 mV reported by Sanyo on n-wafers, this is the highest reported V-oc for SHJ c-Si cells processed by the HWCVD technique. We found that effective c-Si surface cleaning and a double-heterojunction are keys to obtaining high V-oc Transmission electron microscopy reveals that high V-oc cells require an abrupt interface from c-Si to a-Si:H. If the transition from the base wafer to the a-Si:H incorporates either microcrystalline or epitaxial Si at c-Si interface, a low V-oc will result. Lifetime measurement shows that the back-surface-recombination velocity (BSRV) can be reduced to similar to 15 cm/s through a-Si:H passivation. Amorphous silicon heterojunction layers on crystalline wafers thus combine low-surface recombination velocity with excellent carrier extraction.