A Low-power CMOS Power Amplifier for IEEE 802.11a Applications

被引：0
|
作者：
Kang, Jyun-Jie [1 ]
Weng, Ro-Min [1 ]
Liu, Chun-Yu [1 ]
机构：
[1] Natl Dong Hwa Univ, Dept Elect Engn, Hualien, Taiwan
来源：
APMC: 2009 ASIA PACIFIC MICROWAVE CONFERENCE, VOLS 1-5 | 2009年
关键词：
Power amplifier; low power;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A low-power fully-integrated power amplifier (PA) for IEEE 802.11a applications is designed with 0.18 mu m radio frequency CMOS process. A folded cascode structure is adopted to reduce the supply voltage. The driver stage acts as a pre-amplifier which is composed of an inverse amplifier with a gate-driving circuit. The peak power-added efficiency (PAE) is 24.5% at 3V supply voltage. The output 1dB compression point OP1dB is 20.5dBm. The saturated output power achieves 21.8dBm at 5.2GHz. The biasing current of 114mA and 167mA are consumed at quiescent point and P-1dB, respectively. The power gain within the linear operating range is 20.3dB. The maximum output power is 21dBm. The maximum PAE is 24.5%.
引用
收藏
页码：1628 / +
页数：2
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