Low Cost Dynamic Scrubbing for Real-Time Systems

Field-programmable gate arrays (FPGAs) offer several desirable characteristics, such as high speed and flexibility. These characteristics come at a cost, however, as high performance FPGAs use SRAM-based configuration memories that are susceptible to Single Event Upsets (SEUs). The conventional approach is to use some form of redundancy with a periodic scrubbing of the configuration memory, thus removing accumulated SEUs. In this paper we propose a novel approach to scrubbing FPGAs in real-time systems, by using diagnostic information based only on the primary outputs of the circuits, in the form of a coarse-grained DMR, and a specialized scrubbing mechanism to avoid missing real-time deadlines.