A platform-based SoC system modeling method

被引:0
|
作者
Xiong, ZH [1 ]
Li, TJ [1 ]
Li, SK [1 ]
Zhang, MJ [1 ]
机构
[1] Natl Univ Def Technol, Sch Comp Sci, Changsha, Peoples R China
关键词
System-on-a-Chip(SoC); platform-based design; system modeling; Constrained Taskflow Graph(CTG);
D O I
暂无
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
For Platform-Based SoC design method, we put forward Constrained Taskflow Graph (CTG) as SoC system model. Based on CTG, we gave out a novel SoC system modeling method and implemented the system modeling environment CPSME. CTG model implements hierarchical description ability and variable granularity through task breaking up. This model defines subtask execution controlling machine to describe the many task controlling structures including parallel, branch and loop. It also defines task attributes such as running time (speed), power, area and cost to denote task constraint, and it describes task behavior by mapping task to algorithm. The mapping from task flow to algorithm flow favors the generation of system prototype code, which is used for system simulation and validation. Our Platform-Based SoC system modeling method supports CTG model library management supports CTG model reuse and customization. In CPSME, we have conducted SoC system modeling for some real SoC applications, results show that Platform-Based SoC CTG modeling method attains excellent reusing ratio (75%- 90%).
引用
收藏
页码:21 / 25
页数:5
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