Engineering of Si-Rich Nitride Charge-Trapping Layer for Highly Reliable Metal-Oxide-Nitride-Oxide-Semiconductor Type NAND Flash Memory with Multi-Level Cell Operation

被引：3
|
作者：
Fujitsuka, Ryota [1 ]
Sekine, Katsuyuki [1 ]
Sekihara, Akiko [1 ]
Fukumoto, Atsushi [1 ]
Fujita, Junya [1 ]
Aiso, Fumiki [1 ]
Ozawa, Yoshio [2 ]
机构：
[1] Toshiba Co Ltd, Adv Memory Dev Ctr, Semicond Co, Yokaichi, Mie 5128550, Japan
[2] Toshiba Co Ltd, Device Proc Dev Ctr, Ctr Res & Dev, Yokohama, Kanagawa 2358522, Japan
来源：
JAPANESE JOURNAL OF APPLIED PHYSICS | 2012年 / 51卷 / 02期
关键词：
RELIABILITY; PERFORMANCE;
D O I：
10.1143/JJAP.51.021103
中图分类号：
O59 [应用物理学];
学科分类号：
摘要：
The relationship between chemical structure (N/Si ratio) or physical structure (bilayer or laminate structure) of Si-rich nitride charge-trapping layer for metal-oxide-nitride-oxide-semiconductor (MONOS) type NAND flash memory and its electrical characteristics (including program/erase Vth window, fresh cell data retention and data retention after program/erase cycling stress) are investigated in detail. A bilayer charge-trapping structure formed by two different composite Si-rich nitride films has been developed that can realize a sufficient program/erase window and excellent data retention characteristics for multi-level cell (MLC) operation. (C) 2012 The Japan Society of Applied Physics
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页数：6
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