Accelerating Deep Neural Networks with Analog Memory Devices

被引：0

作者：

Ambrogio, Stefano ^{[1
]}

Narayanan, Pritish ^{[1
]}

Tsai, Hsinyu ^{[1
]}

Mackin, Charles ^{[1
]}

Spoon, Katherine ^{[1
]}

Chen, An ^{[1
]}

Fasoli, Andrea ^{[1
]}

Friz, Alexander ^{[1
]}

Burr, Geoffrey W. ^{[1
]}

机构：

[1] IBM Res Almaden, 650 Harry Rd, San Jose, CA 95120 USA

来源：

2020 2ND IEEE INTERNATIONAL CONFERENCE ON ARTIFICIAL INTELLIGENCE CIRCUITS AND SYSTEMS (AICAS 2020) | 2020年

关键词：

NVM; PCM; AI; Accelerator; Analog computing; Training; Inference;

D O I：

10.1109/aicas48895.2020.9073978

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

Acceleration of training and inference of Deep Neural Networks (DNNs) with non-volatile memory (NVM) arrays, such as Phase-Change Memory (PCM), shows promising advantages in terms of energy efficiency and speed with respect to digital implementations using CPUs and GPUs. By leveraging a combination of PCM devices and CMOS circuits, high training accuracy can be achieved, leading to software-equivalent results on small and medium datasets. In addition, weights encoded with multiple PCM devices can lead to high speed and low-power inference, as shown here for Long-Short Term Memory (LSTM) networks.

引用

页码：149 / 152

页数：4

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