A Smart Gate Driver for SiC Power MOSFETs with Aging Compensation and Ringing Suppression

被引：0

作者：

Wang, Mengqi ^{[1
]}

Zhang, Wei Jia ^{[1
]}

Liang, Jingyuan ^{[1
]}

Cui, Wen Tao ^{[1
]}

Ng, Wai Tung ^{[1
]}

Nishio, Haruhiko ^{[2
]}

Sumida, Hitoshi ^{[2
]}

Nakajima, Hiroyuki ^{[2
]}

机构：

[1] Univ Toronto, Edward S Rogers Sr Dept Elect & Comp Engn, Toronto, ON, Canada

[2] Fuji Elect Co Ltd, Matsumoto, Nagano, Japan

来源：

2021 33RD INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS (ISPSD) | 2021年

关键词：

SiC MOSFET; segmented gate driver; aging compensation; Miller plateau; gate ringing suppression;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The application of a segmented gate driver (SGD) to detect aging and provide automated compensation for SiC MOSFETs is presented. By dynamically modifying the gate resistance during switching transients, we can stretch the Miller plateau (MP) duration. The MP level is used as an indicator for the health condition of the SiC power MOSFET. A digital control circuit analyzes the aging effect and provides a control signal to an integrated boost converter, which powers the gate drive voltage. In this manner, the gate drive voltage can be adjusted to compensate for changes in the MOSFET performance. The same SGD can also be used to suppress gate ringing to protect the SiC power device against over/undershoot damage. This is of particular importance at elevated gate voltage.

引用

页码：67 / 70

页数：4

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