A comprehensive bipolar avalanche multiplication compact model for circuit simulation

被引:14
|
作者
Kloosterman, WJ [1 ]
Paasschens, JCJ [1 ]
Havens, RJ [1 ]
机构
[1] Philips Res Labs, NL-5656 AA Eindhoven, Netherlands
关键词
D O I
10.1109/BIPOL.2000.886197
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper a new comprehensive avalanche multiplication model is presented that takes into account the finite thickness of the epilayer, modulation of the electric field by the collector current (Kirk effect), current spreading in the epilayer and quasi-saturation. Two parameters are needed to model the collector voltage dependency at small current levels and one parameter to describe high current effects. The dependency of the collector-emitter breakdown voltage BVceo with collector current is shown. The model will be part of the bipolar compact transistor model Mextram 504, but also can be used separately.
引用
收藏
页码:172 / 175
页数:4
相关论文
共 50 条
  • [1] AVALANCHE MULTIPLICATION IN A COMPACT BIPOLAR-TRANSISTOR MODEL FOR CIRCUIT SIMULATION
    KLOOSTERMAN, WJ
    DEGRAAFF, HC
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1989, 36 (07) : 1376 - 1380
  • [2] COMPACT BIPOLAR-TRANSISTOR MODEL FOR CIRCUIT SIMULATION
    LIOU, JJ
    YUAN, JS
    INTERNATIONAL JOURNAL OF ELECTRONICS, 1990, 68 (02) : 265 - 273
  • [3] AN AVALANCHE MULTIPLICATION MODEL FOR BIPOLAR-TRANSISTORS
    LIOU, JJ
    YUAN, JS
    SOLID-STATE ELECTRONICS, 1990, 33 (01) : 35 - 38
  • [4] A circuit model simulation for separate absorption, grading, charge, and multiplication avalanche photodiodes
    Banoushi, A
    Kardan, MR
    Naeini, MA
    SOLID-STATE ELECTRONICS, 2005, 49 (06) : 871 - 877
  • [5] A comprehensive compact SCR model for CDM ESD circuit simulation
    Lou, Lifang
    Liou, Juin J.
    2008 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 46TH ANNUAL, 2008, : 635 - 636
  • [6] Comprehensive Phase-Change Memory Compact Model for Circuit Simulation
    Pigot, Corentin
    Bocquet, Marc
    Gilibert, Fabien
    Reyboz, Marina
    Cueto, Olga
    Della Marca, Vincenzo
    Zuliani, Paola
    Portal, Jean-Michel
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2018, 65 (10) : 4282 - 4289
  • [7] PIN avalanche photodiodes model for circuit simulation
    Chen, WY
    Liu, SY
    IEEE JOURNAL OF QUANTUM ELECTRONICS, 1996, 32 (12) : 2105 - 2111
  • [8] BIPOLAR-TRANSISTOR MODELING OF AVALANCHE GENERATION FOR COMPUTER CIRCUIT SIMULATION
    DUTTON, RW
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1975, ED22 (06) : 334 - 338
  • [9] Modeling of avalanche multiplication in heterojunction bipolar transistors
    Flitcroft, RM
    Houston, PA
    Ng, CMS
    Button, CC
    COMPOUND SEMICONDUCTOR POWER TRANSISTORS AND STATE-OF-THE-ART PROGRAM ON COMPOUND SEMICONDUCTORS (SOTAPOCS XXIX), 1998, 98 (12): : 117 - 122
  • [10] An Analytical Model of Avalanche Multiplication Factor for Wide Temperature Range Compact Modeling of Silicon-Germanium Heterojunction Bipolar Transistors
    Zhang, Huaiyuan
    Niu, Guofu
    SIGE, GE, AND RELATED MATERIALS: MATERIALS, PROCESSING, AND DEVICES 7, 2016, 75 (08): : 141 - 150