High resolution time-to-digital converter utilizing dual-slope principle

被引:0
|
作者
Jovanovic, GS [1 ]
Stojcev, MK [1 ]
Dordevic, GL [1 ]
Petrovic, BD [1 ]
机构
[1] Fac Elect Engn, YU-18000 Nish, Yugoslavia
关键词
time to digital conversion; dual-slope;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes the architecture and performance of an analog dual-slope high-resolution time-to-digital converter (TDC). The TDC is used as a basic building block for time interval measurement in an ultrasonic liquid flowmeter. Operation of the TDC with 10ps LSB resolution and 1ms input range has been simulated using transistor models 1.2mum double-metal double-poly CMOS technology. The circuit is based on the interpolation time interval measurement principle. Two separate time digitizers improve the time resolution by interpolating within the clock period. These interpolators are based on dual-slope conversion. Performance concerning linearity, relative error the amount of the stretching factor for different section of design parameters are evaluated.
引用
下载
收藏
页码:139 / 142
页数:4
相关论文
共 50 条
  • [1] Design of a Novel Pipeline Time-to-Digital Converter Based on Dual-Slope Interpolation and Time Amplification
    Rezvanyvardom, Mahdi
    Farshidi, Ebrahim
    IETE JOURNAL OF RESEARCH, 2015, 61 (03) : 300 - 307
  • [2] A DIGITAL DUAL-SLOPE ANALOG TO DIGITAL CONVERTER
    JAMAL, H
    HOLMES, FE
    IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS, 1985, 132 (04): : 149 - 152
  • [3] A High Resolution Time-to-Digital Converter Utilizing Coupled Oscillator, ORIGAMI
    Shima, Takeshi
    Retdian, Nicodimus
    2015 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (ECCTD), 2015, : 192 - 195
  • [4] A 0.008-mm2, 35-μW, 8.87-ps-resolution CMOS time-to-digital converter using dual-slope architecture
    Kim, Yeomyung
    Shon, Doohyun
    Kim, Tae Wook
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2017, 45 (04) : 466 - 482
  • [5] A Novel Dual-Slope Resistance-to-Digital Converter
    Mohan, N. Madhu
    George, Boby
    Kumar, V. Jagadeesh
    IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2010, 59 (05) : 1013 - 1018
  • [6] Linearizing Dual-Slope Digital Converter Suitable for a Thermistor
    Mohan, N. Madhu
    Kumar, V. Jagadeesh
    Sankaran, P.
    IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2011, 60 (05) : 1515 - 1521
  • [7] A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line
    Dudek, P
    Szczepanski, S
    Hatfield, JV
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2000, 35 (02) : 240 - 247
  • [8] High Resolution Time-to-digital Converter for PET Imaging
    Abdallah, Nourhan Gamal
    Rashdan, Mostafa
    Khalaf, Ashraf A. M.
    PROCEEDINGS OF 2020 INTERNATIONAL CONFERENCE ON INNOVATIVE TRENDS IN COMMUNICATION AND COMPUTER ENGINEERING (ITCE), 2020, : 295 - 298
  • [9] A DUAL-SLOPE ANALOG-TO-DIGITAL CONVERTER FOR GENERATING POLYNOMIALS
    SHIVARAM, HS
    SHIVAPRASAD, AP
    INTERNATIONAL JOURNAL OF ELECTRONICS, 1980, 49 (05) : 421 - 426
  • [10] DUAL-SLOPE A-D-CONVERTER HAS VARIABLE RESOLUTION
    SMITH, MF
    ELECTRONICS, 1983, 56 (13): : 166 - 167