Filter Bank Channelizers for Multi-Standard Software Defined Radio Receivers

被引:40
|
作者
Mahesh, R. [1 ]
Vinod, A. P. [1 ]
Lai, Edmund M-K. [2 ]
Omondi, Amos [3 ]
机构
[1] Nanyang Technol Univ, Sch Comp Engn, Singapore 639798, Singapore
[2] Massey Univ, Sch Engn & Adv Technol, Massey, New Zealand
[3] Univ Teeside, Sch Comp, Middlesbrough, Cleveland, England
关键词
Software defined radio; Channelization; Digital filter banks; Reconfigurability; Low complexity;
D O I
10.1007/s11265-008-0327-y
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The ability to support multiple channels of different communication standards, in the available bandwidth, is of importance in modern software defined radio (SDR) receivers. An SDR receiver typically employs a channelizer to extract multiple narrowband channels from the received wideband signal using digital filter banks. Since the filter bank channelizer is placed immediately after the analog-to-digital converter (ADC), it must operate at the highest sampling rate in the digital front-end of the receiver. Therefore, computationally efficient low complexity architectures are required for the implementation of the channelizer. The compatibility of the filter bank with different communication standards requires dynamic reconfigurability. The design and realization of dynamically reconfigurable, low complexity filter banks for SDR receivers is a challenging task. This paper reviews some of the existing digital filter bank designs and investigates the potential of these filter banks for channelization in multi-standard SDR receivers. We also review two low complexity, reconfigurable filter bank architectures for SDR channelizers based respectively on the frequency response masking technique and a novel coefficient decimation technique, proposed by us recently. These filter bank architectures outperform existing ones in terms of both dynamic reconfigurability and complexity.
引用
收藏
页码:157 / 171
页数:15
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