Error Floors of Non-Binary LDPC Codes

被引:6
|
作者
Nozaki, Takayuki [1 ]
Kasai, Kenta [1 ]
Sakaniwa, Kohichi [1 ]
机构
[1] Tokyo Inst Technol, Dept Commun & Integrated Syst, Tokyo 1528550, Japan
关键词
PARITY-CHECK CODES; DESIGN;
D O I
10.1109/ISIT.2010.5513602
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
In this paper, we analyze (2, k)-regular non-binary low-density parity-check codes over the binary erasure channels. We propose a method to improve the error floors by optimizing labels in zigzag cycles in the Tanner graph. We analyze the error floors for codes designed by the proposed optimization method and show that the error floors are decreasing in the size of Galois field.
引用
收藏
页码:729 / 733
页数:5
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