±0.25-V Class-AB CMOS Capacitance Multiplier and Precision Rectifiers

被引：9

作者：

Pourashraf, Shirin ^{[1
]}

Ramirez-Angulo, Jaime ^{[1
]}

Hinojo Montero, Jose Maria ^{[2
]}

Gonzalez-Carvajal, Ramon ^{[2
]}

Lopez-Martin, Antonio J. ^{[3
]}

机构：

[1] New Mexico State Univ, Klipsch Sch Elect & Comp Engn, VLSI Lab, Las Cruces, NM 88003 USA

[2] Univ Seville, Escuela Super Ingenieros, Dept Ingn Elect, E-41092 Seville, Spain

[3] Univ Publ Navarra, Inst Smart Cities, Pamplona 31006, Spain

来源：

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | 2019年 / 27卷 / 04期

关键词：

Capacitance multiplier; class-AB current mirror; low supply voltage; precision rectifiers; LOW-VOLTAGE; MODEL;

D O I：

10.1109/TVLSI.2018.2881249

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Reduction of minimum supply requirements is a crucial aspect to decrease the power consumption in VLSI systems. A high-performance capacitance multiplier able to operate with supplies as low as +/- 0.25 V is presented. It is based on adaptively biased class-AB current mirrors which provide high current efficiency. Measurement results of a factor 11 capacitance multiplier fabricated in 180-nm CMOS technology verify theoretical claims. Moreover, low-voltage precision rectifiers based on the same class-AB current mirrors are designed and fabricated in the same CMOS process. They generate output currents over 100 times larger than the quiescent current. Both proposed circuits have 300-nW static power dissipation when operating with +/- 0.25-V supplies.

引用

页码：830 / 842

页数：13

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