Comparison of NBTI kinetics in RMG Si p-FinFETs featuring Atomic Layer Deposition Tungsten (ALD W) Filling Metal Using B2H6 and SiH4 Precursors

被引:1
|
作者
Zhou, Longda [1 ,2 ]
Wang, Guilei [1 ,2 ]
Yin, Xiaogen [1 ,2 ]
Tang, Bo [2 ]
Liu, Qianqian [2 ]
Ji, Zhigang [3 ]
Xu, Hao [2 ]
Kong, Zhenzhen [2 ]
Jiang, Haojie [2 ]
Luo, Ying [2 ]
Simoen, Eddy [4 ]
Yang, Hong [1 ,2 ]
Yin, Huaxiang [1 ,2 ]
Du, Anyan [2 ]
Zhu, Huilong [2 ]
Zhao, Chao [1 ,2 ]
Wang, Wenwu [1 ,2 ]
Ye, Tianchun
机构
[1] Univ Chinese Acad Sci, Microelect Inst, Beijing 100049, Peoples R China
[2] Chinese Acad Sci, Inst Microelect, Key Lab Microelect Devices & Integrated Technol, Beijing 100029, Peoples R China
[3] Liverpool John Moores Univ, 5-09a,James Parsons Bldg,Byrom St, Liverpool L3 3AF, Merseyside, England
[4] IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
关键词
ALD W filling metal; fluorine; strain; NBTI; p-FinFETs; high-k and metal gate (HKMG); RELIABILITY; FLUORINE; SILICON;
D O I
10.1109/ipfa47161.2019.8984837
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Fast characterization methods are used to study negative bias temperature instability (NBTI) kinetics in replacement metal gate Si p-FinFETs filled by atomic layer deposition (ALD) tungsten (W) using B2H6 or SiH4 precursors. The impact of ALD W filling metal process on threshold voltage shift (Delta V-T), generated interface traps (Delta N-IT), pre-existing hole traps (Delta N-HT), stress bias, and temperature dependence of degradation is analyzed. SiH4-based devices show lower Delta V-T compared to B2H6-based devices under identical stress conditions due to lower Delta N-HT and Delta N-IT. More fluoride-passivated interface traps and higher compressive strain along the channel for ALD W using SiH4 are utilized to explain a lower Delta N-IT than ALD W using B2H6. The time kinetics of NBTI degradation is then modeled for long-term prediction and the maximum overdrive voltage is determined. Devices filled with ALD W using SiH4 show superior reliability and a higher operation overdrive voltage, and can be adopted in the 16/14-nm node CMOS technology and beyond.
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页数:6
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