A VLSI Implement of CABAC Encoder for H.265/HEVC

The goal of next generation video codec standard High Efficiency Video Coding (H.265/HEVC) is to improve the coding efficiency 50% without the quality of the image decreasing compared to Advanced Video Coding (H.264/AVC), while introduces large complexity. Context-adaptive binary arithmetic coding (CABAC) is the only allowed entropy coding component. Because of the data dependencies, it is difficult to be parallelized and pipelined. In this paper, we propose a practical structure of CABAC used in H.265 encoder and introduce several optimizations to prove this architecture can be integrated and pipelined in H.265 codec. Meanwhile, we further considered the bypass mode encoding process in the CABAC and try to merge bypass bins. As a result, our design can process up to 6 bins per clock cycle and delivers an average of 4.67 bins per clock cycle. It can work at the frequency of 516Mhz when synthesized in 65 nm. The throughput is 2410 Mbinls, which supports the 8k videos real-time coding.