Hardware/software co-design environment for hierarchical platform-based design

被引:0
|
作者
Xiong, ZH [1 ]
Li, SK
Chen, JH
Zhang, MJ
机构
[1] Natl Univ Def Technol, Sch Informat Syst & Management, Changsha 410073, Peoples R China
[2] Natl Univ Def Technol, Sch Comp Sci, Changsha 410073, Peoples R China
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
To facilitate the design of SoC (System-on-a-Chip), we present a hardware/software co-design environment called HSCDE. In this paper, some critical techniques related to HSCDE are revealed, including Platform-Based SoC modeling technology and ant algorithm based hardware/software partitioning technology. HSCDE environment divides SoC hardware/software co-design processes into three design levels, and it also supports the mappings among these design levels by two design mapping processes. Experimental results show that HSCDE effectively supports hierarchical Platform-Based SoC hardware/software co-design methodology, and further statistics reveal that an average of 10%similar to 25% revisions on platform templates are required to get a new SoC design.
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页码:242 / 251
页数:10
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