A Compressive Sensing Algorithm for Many-Core Architectures

被引：0
|
作者：
Borghi, A. [1 ]
Darbon, J. [2 ]
Peyronnet, S. [1 ]
Chan, T. F. [3 ]
Osher, S. [4 ]
机构：
[1] Univ Paris 11, LRI, INRIA, F-91405 Orsay, France
[2] PRES UniverSud, CNRS, ENS Cachan, CMLA, Cachan, France
[3] Hong Kong Univ Sci & Technol, Hong Kong, Peoples R China
[4] UCLA Math Dept, Los Angeles, CA USA
来源：
ADVANCES IN VISUAL COMPUTING, PT II | 2010年 / 6454卷
关键词：
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
This paper describes a parallel algorithm for solving the l(1)-compressive sensing problem. Its design takes advantage of shared memory, vectorized, parallel and many-core microprocessors such as Graphics Processing Units (GPUs) and standard vectorized multi-core processors (e.g. quad-core CPUs). Experiments are conducted on these architectures, showing evidence of the efficiency of our approach.
引用
收藏
页码：678 / 686
页数：9
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