A Novel Multi Deposition Multi Room-Temperature Annealing Technique via Ultraviolet-Ozone to Improve High-K/Metal (HfZrO/TiN) Gate Stack Integrity for a Gate-Last Process

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作者
Wu, L. [1 ]
Yew, K. S. [1 ]
Ang, D. S. [1 ]
Liu, W. J. [1 ]
Le, T. T. [1 ]
Duan, T. L. [1 ]
Hou, C. H. [2 ]
Yu, X. F. [2 ]
Lee, D. Y. [2 ]
Hsu, K. Y. [2 ]
Xu, J. [2 ]
Tao, H. J. [2 ]
Cao, M. [2 ]
Yu, H. Y. [1 ]
机构
[1] Nanyang Technol Univ, Sch EEE, 50 Nanyang Ave, Singapore 639798, Singapore
[2] TSMC, Hsinchu, Taiwan
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
ALD HfZrO high-K fabricated by novel multi deposition multi annealing (MDMA) technique at room temperature in Ultraviolet-Ozone (UVO) ambient is systematically investigated for the first time via both physical and electrical characterization. As compared to the reference gate stack treated by conventional rapid thermal annealing (RTA) @ 600 degrees C for 30 s (with PVD TiN electrode), the devices receiving MDMA in UVO demonstrates: 1) more than one order of magnitude leakage reduction without EOT penalty at both room temperature and an elevated temperature of 125 degrees C; 2) much improved stress induced degradation in term of leakage increase and flat band voltage shift (both room temperature and 125 degrees C); 3) enhanced dielectrics break-down strength and time-dependant-dielectric-breakdown (TDDB) life time. The improvement strongly correlates with the cycle number of deposition and annealing (D&A, while keeping the total annealing time and total dielectrics thickness as the same). Scanning tunneling microscopy (STM) and X-ray photoelectron spectroscopy (XPS) analysis suggest both oxygen vacancies (V-o) and grain boundaries suppression in the MDMA treated samples are likely responsible for the device improvement. The novel room temperature UVO annealing is promising for the gate stack technology in a gate last integration scheme.
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