共 50 条
- [1] Authentication Protocol Using Error Correcting Codes and Cyclic Redundancy Check [J]. WIRELESS ALGORITHMS, SYSTEMS, AND APPLICATIONS (WASA 2018), 2018, 10874 : 874 - 882
- [2] Undetected error probability performance of cyclic redundancy-check codes of 16-bit redundancy [J]. IEE PROCEEDINGS-COMMUNICATIONS, 2000, 147 (05): : 253 - 256
- [4] Matrix Code Based Error Correction For LUT Based Cyclic Redundancy Check [J]. 1ST GLOBAL COLLOQUIUM ON RECENT ADVANCEMENTS AND EFFECTUAL RESEARCHES IN ENGINEERING, SCIENCE AND TECHNOLOGY - RAEREST 2016, 2016, 25 : 590 - 597
- [5] A Multiple Bits Error Correction Method Based on Cyclic Redundancy Check Codes [J]. ICSP: 2008 9TH INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING, VOLS 1-5, PROCEEDINGS, 2008, : 1809 - 1811
- [6] IMPLEMENTATION OF CYCLIC REDUNDANCY CHECK CIRCUITS [J]. ELECTRONIC ENGINEERING, 1977, 49 (588): : 51 - &
- [7] A Study of Adaptable Co-processors for Cyclic Redundancy Check on an FPGA [J]. 2012 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT'12), 2012, : 119 - 124
- [8] Interleaved cyclic redundancy check (CRC) code [J]. CONFERENCE RECORD OF THE THIRTY-SEVENTH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS & COMPUTERS, VOLS 1 AND 2, 2003, : 2137 - 2141
- [9] Design and implementation of cyclic redundancy check algorithm [J]. COMPUTING, CONTROL, INFORMATION AND EDUCATION ENGINEERING, 2015, : 405 - 409
- [10] Implementation of Cyclic Redundancy Check in Data Communication [J]. 2015 INTERNATIONAL CONFERENCE ON COMPUTATIONAL INTELLIGENCE AND COMMUNICATION NETWORKS (CICN), 2015, : 529 - 531