An Improved FPGA Implementation of Direct Torque Control for Induction Machines

被引:62
|
作者
Sutikno, Tole [1 ,2 ]
Idris, Nik Rumzi Nik [3 ]
Jidin, Auzani [4 ]
Cirstea, Marcian N. [5 ]
机构
[1] Univ Ahmad Dahlan, Dept Elect Engn, Yogyakarta, Indonesia
[2] Univ Teknol Malaysia, Johor Baharu 81310, Malaysia
[3] Univ Teknol Malaysia, Dept Energy Convers, Johor Baharu 81310, Malaysia
[4] Univ Teknikal Malaysia Melaka, Power Elect & Drives Dept, Melaka, Malaysia
[5] Anglia Ruskin Univ, Comp & Technol Dept, Cambridge CB1 1PT, England
关键词
Direct torque control (DTC); field-programmable gate arrays (FPGAs); induction machine; VHDL; STEADY-STATE OPERATION; SWITCHING FREQUENCY; FLUX ESTIMATION; DESIGN; DTC; PERFORMANCE; SIMULATION; INVERTER; SYSTEM;
D O I
10.1109/TII.2012.2222420
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a novel direct torque control (DTC) approach for induction machines, based on an improved torque and stator flux estimator and its implementation using field-programmable gate arrays (FPGA). The DTC performance is significantly improved by the use of FPGA, which can execute the DTC algorithm at higher sampling frequency. This leads to the reduction of the torque ripple and improved flux and torque estimations. The main achievements are: 1) calculating a discrete integration operation of stator flux using backward Euler approach; 2) modifying a so called nonrestoring method in calculating the complicated square root operation in stator flux estimator; 3) introducing a new flux sector determination method; 4) increasing the sampling frequency to 200 kHz such that the digital computation will perform similar to that of the analog operation; and 5) using two's complement fixed-point format approach to minimize calculation errors and the hardware resource usage in all operations. The design was achieved in VHDL, based on a MATLAB/Simulink simulation model. The Hardware-in-the-Loop method is used to verify the functionality of the FPGA estimator. The simulation results are validated experimentally. Thus, it is demonstrated that FPGA implementation of DTC drives can achieve excellent performance at high sampling frequency.
引用
收藏
页码:1280 / 1290
页数:11
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